Invention Grant
- Patent Title: INP-based transistor fabrication
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Application No.: US15694375Application Date: 2017-09-01
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Publication No.: US10541315B2Publication Date: 2020-01-21
- Inventor: Peide Ye , Zhiyuan Cheng , Yi Xuan , Yanqing Wu , Bunmi Adekore , James Fiorenza
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd. , PURDUE RESEARCH FOUNDATION
- Applicant Address: US IN West Lafayette
- Assignee: Purdue Research Foundation
- Current Assignee: Purdue Research Foundation
- Current Assignee Address: US IN West Lafayette
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/78 ; H01L29/66 ; H01L29/51 ; H01L21/28 ; H01L29/778

Abstract:
Methods of forming structures that include InP-based materials, such as a transistor operating as an inversion-type, enhancement-mode device are disclosed. A dielectric layer may be deposited by ALD over a semiconductor layer including In and P. A channel layer may be formed above a buffer layer having a lattice constant similar to a lattice constant of InP, the buffer layer being formed over a substrate having a lattice constant different from a lattice constant of InP.
Public/Granted literature
- US20180019320A1 INP-BASED TRANSISTOR FABRICATION Public/Granted day:2018-01-18
Information query
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