- Patent Title: Mechanism to increase thread parallelism in a graphics processor
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Application No.: US15255553Application Date: 2016-09-02
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Publication No.: US10552211B2Publication Date: 2020-02-04
- Inventor: Yuting Yang , Yuenian Yang , Julia A. Gould , Guei-Yuan Lueh
- Applicant: Intel Corporation
- Applicant Address: unknown Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: unknown Santa Clara
- Agency: Jaffery Watson Mendonsa & Hamilton LLP
- Main IPC: G06F9/48
- IPC: G06F9/48 ; G06F9/52 ; G06T1/20

Abstract:
A processing apparatus is described. The apparatus includes a plurality of execution threads having a first thread space configuration including a first plurality of rows of execution threads to process data in parallel, wherein each thread in a row is dependent on a top neighbor thread in a preceding row, partition logic to partition the plurality of execution threads into a plurality of banks, wherein each bank includes one or more of the first plurality of rows of execution threads and transform logic to transform the first thread space configuration to a second thread space configuration including a second plurality of rows of execution threads to enable the plurality of execution threads in each of the plurality of banks to operate in parallel.
Public/Granted literature
- US20180067763A1 Mechanism to Increase Thread Parallelism in a Graphics Processor Public/Granted day:2018-03-08
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