Invention Grant
- Patent Title: Superconducting system architecture for high-performance energy-efficient cryogenic computing
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Application No.: US15774503Application Date: 2016-11-10
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Publication No.: US10552756B2Publication Date: 2020-02-04
- Inventor: Engin Ipek , Ben Feinberg , Shibo Wang , Mahdi N. Bojnordi , Ravi Patel , Eby G. Friedman
- Applicant: Engin Ipek , Ben Feinberg , Shibo Wang , Mahdi N. Bojnordi , Ravi Patel , Eby G. Friedman
- Applicant Address: US NY Rochester
- Assignee: University of Rochester
- Current Assignee: University of Rochester
- Current Assignee Address: US NY Rochester
- Agency: Harris Beach PLLC
- International Application: PCT/US2016/061292 WO 20161110
- International Announcement: WO2018/009240 WO 20180111
- Main IPC: G06N10/00
- IPC: G06N10/00 ; G06F7/38 ; H01L39/22 ; G06F9/30 ; G11C11/16 ; G11C11/44 ; G11C19/32 ; H03K19/195 ; H01L27/18 ; H01L27/22 ; H01L43/02

Abstract:
An energy efficient rapid single flux quantum (ERSFQ) logic register wheel includes a circular shift register having a plurality of destructive read out (DRO) cells. Each entry of the circular shift register includes a data block, a tag, and a valid bit. A compare and control logic is coupled to the circular shift register to compare a source specifier or a destination register specifier against a register tag stored in the wheel following each cycle of the register wheel. At least one or more read ports and at least one or more write ports are coupled to the circular shift register to write to or to read from a different entry each in the register wheel following each cycle of the register wheel. A RSFQ clearable FIFO with flushing and a crosspoint memory topology for integrating MRAM devices with ERSFQ circuits are also described.
Public/Granted literature
- US20190188596A1 SUPERCONDUCTING SYSTEM ARCHITECTURE FOR HIGH-PERFORMANCE ENERGY-EFFICIENT CRYOGENIC COMPUTING Public/Granted day:2019-06-20
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