Invention Grant
- Patent Title: Reducing memory latency in graphics operations
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Application No.: US15201163Application Date: 2016-07-01
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Publication No.: US10552934B2Publication Date: 2020-02-04
- Inventor: Michael Apodaca , David M. Cimini , Thomas F. Raoux , Somnath Ghosh , Uddipan Mukherjee , Debraj Bose , Sthiti Deka , Yohai Gevim
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Spectrum IP Law Group LLC
- Main IPC: G06T1/20
- IPC: G06T1/20 ; G06T15/80 ; G06T1/60 ; G06F12/0886 ; G06F12/0855 ; G06F12/084 ; G06F12/0831 ; G06F12/0811 ; G06F12/0804 ; G06F9/30 ; G06F12/00

Abstract:
Methods and apparatus relating to reducing memory latency in graphics operations are described. In an embodiment, uniform data is transferred from a buffer to a General Register File (GRF) of a processor based at least in part on information stored in a gather table. The uniform data comprises data that is uniform across a plurality of primitives in a graphics operation. Other embodiments are also disclosed and claimed.
Public/Granted literature
- US20180005345A1 REDUCING MEMORY LATENCY IN GRAPHICS OPERATIONS Public/Granted day:2018-01-04
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