Invention Grant
- Patent Title: Semiconductor manufacturing using disposable test circuitry within scribe lanes
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Application No.: US14153417Application Date: 2014-01-13
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Publication No.: US10553508B2Publication Date: 2020-02-04
- Inventor: Douglas M. Reber , Sergio A. Ajuria , Phuc M. Nguyen
- Applicant: Douglas M. Reber , Sergio A. Ajuria , Phuc M. Nguyen
- Applicant Address: US TX Austin
- Assignee: NXP USA, INC.
- Current Assignee: NXP USA, INC.
- Current Assignee Address: US TX Austin
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L21/78 ; H01L23/00

Abstract:
Embodiments are disclosed for semiconductor manufacturing using disposable test circuitry formed within scribe lanes. The manufacturing steps can include forming device circuitry within a semiconductor die and forming test circuitry within a scribe lane. One or more electrical connection route lines are also formed that connect the device circuitry and test circuitry blocks. Further, each die can be connected to a single test circuitry block, or multiple dice can share common test circuitry blocks. After testing, the electrical connection route line(s) are sealed, and the test circuitry is discarded when the device dice are singulated. For certain embodiments, the edge of the devices dice are encapsulated with a protective metal layer, and certain other embodiments include protective sealrings through which the connection route lines pass to enter the dice from the test circuitry blocks within the scribe lanes.
Public/Granted literature
- US20150200146A1 Semiconductor Manufacturing Using Disposable Test Circuitry Within Scribe Lanes Public/Granted day:2015-07-16
Information query
IPC分类: