Invention Grant
- Patent Title: Test circuit block, variable resistance memory device including the same, and method of forming the variable resistance memory device
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Application No.: US16016148Application Date: 2018-06-22
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Publication No.: US10553644B2Publication Date: 2020-02-04
- Inventor: Seok Joon Kang , Ho Seok Em
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si, Gyeonggi-do
- Assignee: Sk hynix Inc.
- Current Assignee: Sk hynix Inc.
- Current Assignee Address: KR Icheon-si, Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2017-0155058 20171120
- Main IPC: H01L27/24
- IPC: H01L27/24 ; G11C29/12 ; G11C13/00 ; H01L45/00 ; H01L21/66 ; G11C29/02 ; G11C29/24 ; G11C29/04 ; G11C5/02
Abstract:
A test circuit block may include a first signal line, a second signal line, a high resistive path unit, and a low resistive path unit. The high resistive path unit may be connected between the first signal line and the second signal line. The low resistive path unit may have a resistance lower than that of the high resistive path unit. The low resistive path unit may be selectively connected in parallel with the high resistive path unit between the first signal line and the second signal line.
Public/Granted literature
Information query
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