Invention Grant
- Patent Title: Low latency contention based scheduling request
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Application No.: US15575320Application Date: 2015-12-24
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Publication No.: US10555322B2Publication Date: 2020-02-04
- Inventor: Gang Xiong , Seunghee Han , Yushu Zhang , Yuan Zhu , Jong-Kae Fwu
- Applicant: INTEL IP CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL IP CORPORATION
- Current Assignee: INTEL IP CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Thorpe North & Western
- International Application: PCT/US2015/000407 WO 20151224
- International Announcement: WO2016/204713 WO 20161222
- Main IPC: H04W72/08
- IPC: H04W72/08 ; H04L5/00 ; H04W72/04 ; H04W72/12

Abstract:
Technology for decreasing latency for contention based scheduling request (SR) transmission is disclosed. A user equipment (UE) can process, for transmission to an enhanced node B (eNB), a DeModulation Reference Signal (DM-RS) that is randomly selected from a set of configured DM-RS sequences or configured by the eNB. The UE can select an SR transmission resource as a function of a DM-RS sequence index or cell identification (ID) based on a predefined mapping rule. The UE can process, for transmission to the eNB, a SR message having a buffer status report (BSR) and UE identification (UE-ID) information on the selected SR transmission resource.
Public/Granted literature
- US20180152950A1 LOW LATENCY CONTENTION BASED SCHEDULING REQUEST Public/Granted day:2018-05-31
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