Invention Grant
- Patent Title: Wafer level integrated MEMS device enabled by silicon pillar and smart cap
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Application No.: US15823969Application Date: 2017-11-28
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Publication No.: US10556792B2Publication Date: 2020-02-11
- Inventor: Yi-Chia Lee , Chin-Min Lin , Cheng San Chou , Hsiang-Fu Chen , Wen-Chuan Tai , Ching-Kai Shen , Hua-Shu Ivan Wu , Fan Hu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: B81C1/00
- IPC: B81C1/00 ; B81B7/02

Abstract:
The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. A device substrate comprising first and second MEMS devices is bonded to a capping substrate comprising first and second recessed regions. A ventilation trench is laterally spaced apart from the recessed regions and within the second cavity. A sealing structure is arranged within the ventilation trench and defines a vent in fluid communication with the second cavity. A cap is arranged within the vent to seal the second cavity at a second gas pressure that is different than a first gas pressure of the first cavity.
Public/Granted literature
- US20190161346A1 WAFER LEVEL INTEGRATED MEMS DEVICE ENABLED BY SILICON PILLAR AND SMART CAP Public/Granted day:2019-05-30
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