A direct digital synthesizer (DDS) is controlled by a suitably configured programmable logic device (PLD). The DDS includes a digital analog converter (DAC), and a coupled driver/buffer configured to drive relatively high capacitive loads with substantially rail to rail sinusoidal driver output signals and with little to no waveform distortion. The DAC includes a PMOS and NMOS DACs, and a switch configured to select the PMOS DAC for negative portions and the NMOS DAC for positive portions of an output analog signal generated by the DAC. The driver includes a pair of input differential amplifiers, PMOS and NMOS structures, which may be variable, and a pair of variable current sources. The PLD controls variable elements of the DDS to adjust the achievable positive and negative slew rates of the DDS, independently of one another, to reduce or eliminate risk of signal distortion while maintaining substantially stable rail to rail output.