Invention Grant
- Patent Title: Tightly integrated accelerator functions
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Application No.: US15607138Application Date: 2017-05-26
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Publication No.: US10558440B2Publication Date: 2020-02-11
- Inventor: John W. Marshall , Earl Hardin Booth, III , Andrew William Keep , Robert Leroy King
- Applicant: CISCO TECHNOLOGY, INC.
- Applicant Address: US CA San Jose
- Assignee: Cisco Technology, Inc.
- Current Assignee: Cisco Technology, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: G06F9/44
- IPC: G06F9/44 ; G06F8/35 ; G06F9/445 ; G06F9/54 ; G06F8/41

Abstract:
In an example, there is disclosed a computing system, including: a processor; a memory; a configuration interface to a logic configuration unit; and a system compiler including: a first block compiler to compile logic for a first logical block in a first language, the first language being a domain-specific language (DSL) and the first logical block being switching logic for a network switch; a second block compiler to compile logic for a second logical block in a second language, the second language being a non-DSL and providing an external accelerator method not supported by the first language; and an interface compiler to define input/output channels for encapsulated data interchange between the first logical block and the second logical block, wherein the encapsulated data interchange is to target a resident instance of the external accelerator method.
Public/Granted literature
- US20180217823A1 TIGHTLY INTEGRATED ACCELERATOR FUNCTIONS Public/Granted day:2018-08-02
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