Invention Grant
- Patent Title: Method of correcting errors in a memory array and a system for implementing the same
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Application No.: US15634876Application Date: 2017-06-27
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Publication No.: US10558525B2Publication Date: 2020-02-11
- Inventor: Yu-Der Chih , Chia-Fu Lee , Chien-Yin Liu , Yi-Chun Shih , Kuan-Chun Chen , Hsueh-Chih Yang , Shih-Lien Linus Lu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: G06F11/10
- IPC: G06F11/10 ; H03M13/29 ; H03M13/15 ; H03M13/19 ; G11C29/42

Abstract:
A method of correcting errors in a memory array. The method includes configuring a first memory array with a first error correction code (ECC) to provide error correction of data stored in the first memory array, configuring a second memory array with a second ECC to provide error correction of the data stored in the first memory array, performing a reflow process on the first and second memory array, and correcting data stored in the first memory array based on at least the first ECC or the second ECC. The first memory array includes a first set of memory cells arranged in rows and columns. The second memory array includes a second set of memory cells arranged in rows and columns.
Public/Granted literature
- US20180004602A1 METHOD OF CORRECTING ERRORS IN A MEMORY ARRAY AND A SYSTEM FOR IMPLEMENTING THE SAME Public/Granted day:2018-01-04
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