An array substrate includes: gate lines; data lines crossing the gate lines; first additional signal lines crossing the gate lines and an array of pixels, pixels in each of rows of pixels are connected to a same one of the gate lines; and there are one data line and one first additional signal line between any two adjacent columns of pixels; the array comprises first rows of pixels and second rows of pixels, the first pixels in each of first rows of pixels are connected respectively to the data lines, and the second pixels in each of second rows of pixels are connected respectively to the first additional signal lines; the gate lines comprise first gate lines and second gate lines, the first rows of pixels are connected respectively to the first gate lines, and the second rows of pixels are connected respectively to the second gate lines.