A semiconductor device includes a first buffer circuit configured to generate a first internal chip select signal by buffering a chip select signal in response to a buffer control signal; a second buffer circuit configured to generate a second internal chip select signal by buffering the chip select signal in response to the buffer control signal; and a control circuit configured to generate the buffer control signal by sensing logic levels of a reset signal and the second internal chip select signal, and generate an initialization signal which is enabled during an initializing operation period, in response to the reset signal and the buffer control signal.