Invention Grant
- Patent Title: Semiconductor device and control method
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Application No.: US16126516Application Date: 2018-09-10
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Publication No.: US10559361B2Publication Date: 2020-02-11
- Inventor: Shinya Naito , Takayuki Kakegawa
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2018-049770 20180316
- Main IPC: G11C16/06
- IPC: G11C16/06 ; G11C16/26 ; H01L27/11565 ; H01L27/11582 ; H01L27/1157 ; G11C11/56 ; H01L23/522 ; G11C16/04

Abstract:
According to one embodiment, there is provided a semiconductor device including a first semiconductor region, a stacked body, a semiconductor channel, a gate insulating film, and a control circuit. The stacked body is of conductive films arranged in a stacking direction with an insulator interposed. The semiconductor channel penetrates the stacked body in the stacking direction, and is electrically connected at one end to the first semiconductor region. The gate insulating film is arranged between the stacked body and the semiconductor channel. The control circuit supplies a first voltage to a closest conductive film of the stacked body to the first semiconductor region, and supplies a second voltage higher than the first voltage to the first semiconductor region, at a time of reading information from one of memory cells formed at positions where the conductive films intersect with the semiconductor channel.
Public/Granted literature
- US20190287628A1 SEMICONDUCTOR DEVICE AND CONTROL METHOD Public/Granted day:2019-09-19
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