Invention Grant
- Patent Title: Voltage degradation aware NAND array management
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Application No.: US16405192Application Date: 2019-05-07
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Publication No.: US10559369B2Publication Date: 2020-02-11
- Inventor: Sebastien Andre Jean , Harish Reddy Singidi
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/34 ; G11C16/04 ; G11C16/10 ; G11C16/30 ; G11C16/26 ; G06F13/16

Abstract:
Devices and techniques for voltage degradation aware NAND array management are disclosed herein. Voltage to a NAND device is monitored to detect a voltage event. A history of voltage events is modified with the voltage event. A voltage condition is observed from the history of voltage events. An operational parameter of a NAND array in the NAND device is then modified in response to the voltage condition.
Public/Granted literature
- US20190259463A1 VOLTAGE DEGRADATION AWARE NAND ARRAY MANAGEMENT Public/Granted day:2019-08-22
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