Invention Grant
- Patent Title: Patterning methods for semiconductor devices and structures resulting therefrom
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Application No.: US16004086Application Date: 2018-06-08
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Publication No.: US10559492B2Publication Date: 2020-02-11
- Inventor: Tai-Yen Peng , Wen-Yen Chen , Chih-Hao Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/033 ; H01L23/522 ; H01L23/528 ; H01L21/311

Abstract:
Semiconductor devices and methods of forming semiconductor devices are provided. A method includes forming a first mask layer over a target layer, forming a plurality of spacers over the first mask layer, and forming a second mask layer over the plurality of spacers and patterning the second mask layer to form a first opening, where in a plan view a major axis of the opening extends in a direction that is perpendicular to a major axis of a spacer of the plurality of spacers. The method also includes depositing a sacrificial material in the opening, patterning the sacrificial material, etching the first mask layer using the plurality of spacers and the patterned sacrificial material, etching the target layer using the etched first mask layer to form second openings in the target layer, and filling the second openings in the target layer with a conductive material.
Public/Granted literature
- US20190148221A1 Patterning Methods for Semiconductor Devices and Structures Resulting Therefrom Public/Granted day:2019-05-16
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