Invention Grant
- Patent Title: 2-step die attach for reduced pedestal size of laminate component packages
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Application No.: US16133117Application Date: 2018-09-17
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Publication No.: US10559524B1Publication Date: 2020-02-11
- Inventor: Sadia Naseem , Vikas Gupta , Rongwei Zhang
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Ronald O. Neerings; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L29/00 ; H01L23/12 ; H01L23/495 ; H01L23/64 ; H01L23/00 ; H01L21/56 ; H01F27/28
Abstract:
A packaged semiconductor device includes a leadframe (LF) having a plurality of laminate-supporting pedestals. A cured first die attach (DA) material is on an outer edge of the pedestals being an ultraviolet (UV)-curing DA material having a photoinitiator or a cured B-stage DA material. A cured thermally-curing DA material is on an area of the pedestals not occupied by the UV-curing DA material. A laminate component having bond pads on a top side is mounted top side up on the plurality of pedestals.
Information query
IPC分类:
