Invention Grant
- Patent Title: Wafer level packages, semiconductor device units, and methods of fabricating the same
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Application No.: US15816313Application Date: 2017-11-17
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Publication No.: US10559539B2Publication Date: 2020-02-11
- Inventor: Jong Hyun Nam
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si, Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si, Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2017-0043572 20170404
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/538 ; H01L23/31 ; H01L21/56
Abstract:
A wafer level package and or a semiconductor device unit may be provided. The wafer level package may include semiconductor chips disposed on an interconnection structure layer and laterally spaced apart from each other. The wafer level package may include a reinforcement zig attached to the semiconductor chips. The wafer level package may include a molded layer covering the semiconductor chips and embedding the reinforcement zig. Related methods are also provided.
Public/Granted literature
- US20180286818A1 WAFER LEVEL PACKAGES, SEMICONDUCTOR DEVICE UNITS, AND METHODS OF FABRICATING THE SAME Public/Granted day:2018-10-04
Information query
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