Invention Grant
- Patent Title: Manufacturing method of semiconductor device including transistor having offset insulating layers
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Application No.: US15662010Application Date: 2017-07-27
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Publication No.: US10559576B2Publication Date: 2020-02-11
- Inventor: Dong Hwan Lee , Min Gyu Koo , Hyun Heo
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2015-0059962 20150428; KR10-2015-0110684 20150805
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L27/11529 ; H01L27/11573 ; H01L27/11526 ; H01L29/78 ; H01L29/06 ; H01L27/11556 ; H01L27/11582 ; H01L27/1157 ; H01L21/265 ; H01L29/10
Abstract:
A semiconductor device includes a substrate having a memory array region and a peripheral region, isolation layers formed in the peripheral region to define an active region, offset insulating layers separated from each other and formed in the active region, and a gate electrode having edges overlapping with the offset insulating layers and arranged in the active region between the offset insulating layers.
Public/Granted literature
- US20170323897A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Public/Granted day:2017-11-09
Information query
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