- Patent Title: Approach to the manufacturing of monolithic 3-dimensional high-rise integrated-circuits with vertically-stacked double-sided fully-depleted silicon-on-insulator transistors
-
Application No.: US15731051Application Date: 2017-04-11
-
Publication No.: US10559594B2Publication Date: 2020-02-11
- Inventor: Ahmad Tarakji , Nirmal Chaudhary
- Applicant: Ahmad Tarakji , Nirmal Chaudhary
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L23/00 ; H01L29/786 ; H01L27/02 ; H01L21/8226 ; H01L21/768
Abstract:
A new architecture to fabricate high-rise fully monolithic three-dimensional Integrated-Circuits (3D-ICs) is described. It has the major advantage over all known prior arts in that it substantially reduces RC-delays and fully eliminates or very substantially reduces the large and bulky electrically conductive Through-Silicon-VIAS in a monolithic 3D integration. This enables the 3D-ICs to have faster operational speed with denser device integration.
Public/Granted literature
Information query
IPC分类:
