Invention Grant
- Patent Title: Semiconductor package structure
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Application No.: US16113116Application Date: 2018-08-27
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Publication No.: US10559728B2Publication Date: 2020-02-11
- Inventor: Chih-Ming Ho , Chun-Chih Liang , Ding-Hwa Cherng , Kuang-Mao Lu , Wen-Chueh Lo , Hao-Yu Yang , Chieh-Yu Kang , Han-Chang Pan
- Applicant: Everlight Electronics Co., Ltd.
- Applicant Address: TW New Taipei
- Assignee: Everlight Electronics Co., Ltd.
- Current Assignee: Everlight Electronics Co., Ltd.
- Current Assignee Address: TW New Taipei
- Agency: Chen Yoshimura LLP
- Main IPC: H01L33/54
- IPC: H01L33/54 ; H01L33/48 ; H05K1/18 ; H01L31/02 ; H01L31/0203 ; H01L33/56 ; H01L33/62 ; H01S5/022 ; H01L23/00 ; H01L23/13 ; H01L23/31 ; H05K3/34 ; H05K1/11

Abstract:
A semiconductor package structure is disclosed. The package structure includes a first substrate, a second substrate on which the first substrate is disposed, and a semiconductor chip which is disposed on the first substrate. The two substrates can include two notches or two solder receiving portions. Therefore, when the package structure is disposed on the printed circuit board (PCB), the package structure will protrude less on the surface of the printed circuit board (PCB); or, the solders on the printed circuit board (PCB) will not be shifted by the package structure.
Public/Granted literature
- US20190259924A1 SEMICONDUCTOR PACKAGE STRUCTURE Public/Granted day:2019-08-22
Information query
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