Frequency synthesizer circuitry includes multi-phase clock generator circuitry, frequency divider circuitry, signal retiming circuitry, and signal combining circuitry. The multi-phase clock generator circuitry receives an input clock signal and generates a number of multi-phase clock signals. The frequency divider circuitry also receives the input clock signal and performs frequency division thereon to generate a reference signal. The signal retiming circuitry receives the reference signal and the multi-phase clock signals and generates a number of retiming signals. The signal combining circuitry combines two of the retiming signals to provide an output clock signal that has the same frequency as the reference signal but a different duty cycle.