Invention Grant
- Patent Title: Apparatuses and methods including configurable logic circuits and layout thereof
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Application No.: US16520160Application Date: 2019-07-23
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Publication No.: US10560100B1Publication Date: 2020-02-11
- Inventor: Ken Ota
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H03K19/173 ; H03K19/20 ; G11C11/407
Abstract:
Embodiments of the disclosure are drawn to apparatuses and methods for arranging configurable logic circuits such that the configurable logic circuit may be configured to form one or more of several logic circuits by coupling a combination of nodes included in the logic circuit. Configuring the configurable logic circuit may include modification of a single wiring layer.
Information query
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