A nested mixed-radix DDSM can guarantee zero systematic frequency error when used as a divider controller in a fractional-N frequency synthesizer is described. This disclosure presents a nested cascaded mixed-radix DDSM architecture which can also guarantee zero systematic frequency error. In addition, the disclosure allows one to use higher order auxiliary modulators and shaped dither signal to eliminate feedthrough spurs completely. By increasing the number of levels in the cascade, the moduli of the individual modulator stages can be reduced, thereby increasing the speed of the synthesizer.