Programmable hardware sleep cycle controller for 802.11 wireless devices supporting low-power
Abstract:
A wireless device includes a sleep mode controller circuit (SMC), an RF circuit, and a processor. The SMC is configured to identify from a message that there is no impending data traffic to be received from another wireless device, put the wireless device into a power down mode powering down the processor and the RF circuit, and periodically checking for a another received message. Checking the RF message includes powering on the RF circuit on a periodic basis, determining whether another received message indicates that there is impending data traffic to be received from another wireless device, and, based on a determination that that there is impending data traffic to be received from another wireless device, powering up the processor.
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