A device includes a non-volatile memory and a low density parity check (LDPC) decoder configured to receive a representation of a codeword from the non-volatile memory. The LDPC decoder includes multiple data processing units (DPUs) and a control circuit coupled to the DPUs. The control circuit is responsive to an error metric associated with the representation of the codeword and is configured to set a message resolution at least partially based on the error metric and to selectively disable one or more components of the LDPC decoder based on the message resolution.