Methods and apparatus for memory management are described. In a disclosed embodiment, a system has a first and a second processor, with each processor able to access a memory system. A first work unit is received for execution by the first processor, with the memory system being accessed. A second work unit is generated for execution by a second processor upon execution of a first work unit. Only after the memory system is updated does processing of the second work unit by the second processor occur. This work unit message based ordering provides relay consistency for memory operations of multiple processors.