Information processing device, information processing method, main processor core, program, information processing method, and sub processor core
Abstract:
A main processor core having a first memory and a sub processor core having a second memory and controlled by the main processor core are included. An operating system is incorporated in the main processor core, and no operating system is incorporated in the sub processor core. Shared memories are formed in the first and second memories, respectively. Data in the shared memories of the first and second memories are synchronized. The main processor core is configured to synchronize the data in the shared memories formed in the first and second memories while the sub processor core stops operating.
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