- Patent Title: Semiconductor device having engineering change order (ECO) cells
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Application No.: US16206881Application Date: 2018-11-30
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Publication No.: US10565345B2Publication Date: 2020-02-18
- Inventor: Li-Chun Tien , Ting-Wei Chiang , Shun Li Chen , Ting Yu Chen , XinYong Wang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H01L21/768 ; H01L27/02 ; H01L27/118 ; H01L23/522 ; H01L23/528

Abstract:
A cell, in a semiconductor device, including: first and second active areas in a semiconductor substrate on opposite sides of the first axis; first, third and fifth, and correspondingly collinear second, fourth and sixth, having long axes in a second direction perpendicular to the first direction; the (A) first, third and fifth, and (B) second, fourth and sixth, conductive structures correspondingly overlapping the second active area; the first and second conductive structures correspondingly being centered between the (C) third and fifth, and (D) fourth and sixth, conductive structures; and a seventh conductive structure; the fourth conductive structure being located over first and second gaps between corresponding ones of the third through sixth, conductive structures; and the fourth conductive structure occupying an area which substantially overlaps one of the first and second conductive structures and a corresponding one of the first and second gaps.
Public/Granted literature
- US20190114382A1 STANDARD CELL LAYOUT, SEMICONDUCTOR DEVICE HAVING ENGINEERING CHANGE ORDER (ECO) CELLS AND METHOD Public/Granted day:2019-04-18
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