Invention Grant
- Patent Title: Semiconductor memory device
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Application No.: US15896365Application Date: 2018-02-14
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Publication No.: US10566049B2Publication Date: 2020-02-18
- Inventor: Kenji Sakurada , Masanobu Shirakawa
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2017-176677 20170914
- Main IPC: G11C16/24
- IPC: G11C16/24 ; G11C11/419 ; G11C16/34 ; G11C7/06 ; G11C16/32 ; G11C16/26 ; G11C11/56 ; G11C16/08 ; G11C16/04

Abstract:
According to one embodiment, a semiconductor memory device includes: a first memory cell; a first latch circuit; and a second latch circuit. The first latch circuit and the second latch circuit are associated with the first memory cell. When the semiconductor memory device receives, from an external device, a first address designating one of the first latch circuit and the second latch circuit and a read command for data of the first memory cell, data is read from the first memory cell and the read data is held in the one of the first latch circuit and the second latch circuit corresponding to the first address.
Public/Granted literature
- US20190080747A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2019-03-14
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