Invention Grant
- Patent Title: Test apparatus and semiconductor chip
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Application No.: US15956148Application Date: 2018-04-18
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Publication No.: US10566073B2Publication Date: 2020-02-18
- Inventor: Jong Ho Jung
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si, Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si, Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2016-0024360 20160229
- Main IPC: G11C29/38
- IPC: G11C29/38 ; G11C29/44 ; G11C29/56

Abstract:
A test apparatus may be provided. The test apparatus may include a delay compensator configured to generate delayed read data by delaying read data according to a difference between an external turnaround delay value provided externally from the test apparatus and a turnaround delay detection value detected within the test apparatus. The test apparatus may include a determination circuit configured to perform a test result determination operation by comparing the delayed read data with reference data. The turnaround delay detection value may be generated by detecting a time of from a point of time when write data including a read command as the reference data is output to a point of time when the read data is received.
Public/Granted literature
- US20180233214A1 TEST APPARATUS AND SEMICONDUCTOR CHIP Public/Granted day:2018-08-16
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