Invention Grant
- Patent Title: Gate structures of FinFET semiconductor devices
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Application No.: US16203623Application Date: 2018-11-29
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Publication No.: US10566202B1Publication Date: 2020-02-18
- Inventor: Jiehui Shu , Hui Zang , Hong Yu
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agent David Cain
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/8234 ; H01L27/088 ; H01L21/28 ; H01L29/06 ; H01L29/423

Abstract:
A method of fabricating a semiconductor device is provided, including providing sacrificial gate structures over a plurality of fins. The sacrificial gate structures include a sacrificial first gate structure and a sacrificial second gate structure. A first gate cut process is performed to form a first gate cut opening in the sacrificial first gate structure, and a second gate cut opening in the sacrificial second gate structure. A first dielectric layer is deposited in the first gate cut opening and the second gate cut opening. The first dielectric layer completely fills the first gate cut opening and partially fills the second gate cut opening. The first dielectric layer is removed from the second gate cut opening, and a second gate cut process is performed. A second dielectric layer is deposited in the second gate cut opening to form a gate cut structure.
Information query
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