Invention Grant
- Patent Title: Semiconductor element
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Application No.: US16209391Application Date: 2018-12-04
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Publication No.: US10566303B2Publication Date: 2020-02-18
- Inventor: Atsushi Kurokawa
- Applicant: Murata Manufacturing Co., Ltd.
- Applicant Address: JP Kyoto
- Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee Address: JP Kyoto
- Agency: Pearne & Gordon LLP
- Priority: JP2017-234277 20171206
- Main IPC: H01L29/80
- IPC: H01L29/80 ; H01L23/00 ; H01L29/417 ; H01L29/08 ; H01L29/06 ; H01L27/082 ; H01L29/205 ; H01L29/45 ; H01L27/098 ; H01L29/423 ; H01L29/737

Abstract:
A transistor includes a semiconductor region provided on a substrate and three different terminal electrodes. At least one terminal electrode has an isolated electrode structure composed of a plurality of conductor patterns. A bump, which electrically connects the plurality of conductor patterns to each other, is arranged on the terminal electrode having the isolated electrode structure. A stress-relaxing layer, which is composed of a metal material containing a high-melting-point metal, is arranged between the semiconductor region of the transistor and the bump. No current path for connecting the plurality of conductor patterns to each other is arranged between the conductor patterns and the bump.
Public/Granted literature
- US20190172806A1 SEMICONDUCTOR ELEMENT Public/Granted day:2019-06-06
Information query
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