Invention Grant
- Patent Title: System related integrated circuit, apparatus and method
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Application No.: US16105424Application Date: 2018-08-20
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Publication No.: US10566978B2Publication Date: 2020-02-18
- Inventor: Francesco Pappalardo , Giuseppe Notarangelo
- Applicant: STMicroelectronics S.r.l.
- Applicant Address: IT Agrate Brianza (MB)
- Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee Address: IT Agrate Brianza (MB)
- Agency: Slater Matsil, LLP
- Priority: IT102016000122044 20161201
- Main IPC: H03K19/21
- IPC: H03K19/21 ; H03K19/173 ; H04L29/12

Abstract:
A system includes a processing circuit and a circuit configured to output a given number N of bits of configuration information to be used by the processing circuit. The circuit includes a non-volatile programmable memory configured to output a first group of N bits, N terminals for receiving a second group of N bits, and N logic gates. A first input terminal of each logic gate is connected to a respective bit of output from the non-volatile programmable memory and wherein a second input terminal of each logic gate is connected to a respective terminal of the N terminals.
Public/Granted literature
- US20190013813A1 System Related Integrated Circuit, Apparatus and Method Public/Granted day:2019-01-10
Information query
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