Invention Grant
- Patent Title: Method and apparatus to reduce delays in channel estimation
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Application No.: US16277066Application Date: 2019-02-15
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Publication No.: US10567200B2Publication Date: 2020-02-18
- Inventor: Naveen Jacob , Chaithanya Velampalli
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP18159195 20180228
- Main IPC: H04B1/16
- IPC: H04B1/16 ; H04L25/02 ; H04B1/06

Abstract:
A signal processor and method of signal processing to reduce delays in channel estimation is described. In the method, the following operations are performed: receiving a signal at a signal processor (200); estimating a first channel from the received signal with a one-dimensional, 1D, frequency filter (304) in a frequency domain to generate an interim output; decoding said interim output (406) to generate decoded interim output; estimating (414,418) at least a second channel from the decoded interim output with a two-dimensional, 2D, filter (100) to produce a final output (420).
Public/Granted literature
- US20190268182A1 METHOD AND APPARATUS TO REDUCE DELAYS IN CHANNEL ESTIMATION Public/Granted day:2019-08-29
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