Methods and systems for achieving a high frame rate video with compatibility for existing receivers without depending bitstream encoding are provided herein. For example, an apparatus comprises: a memory; and one or more processors configured to execute instructions stored in the memory. The instructions comprise: receiving a first bitstream having a first packet identifier (“PID”) and a second bitstream having a second PID; decoding the first bitstream and the second bitstream; and interleaving the decoded first bitstream and the decoded second bitstream to form a high frame rate video signal, wherein the high frame rate video signal has a frame rate equal to the sum of the frame rate of the decoded first bitstream and the decoded second bitstream.