Invention Grant
- Patent Title: Manufacturing method for multi-layer printed circuit board
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Application No.: US15528081Application Date: 2015-11-26
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Publication No.: US10568212B2Publication Date: 2020-02-18
- Inventor: Makoto Fujimura , Takashi Iga , Akihiro Tanabe
- Applicant: ZEON CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Womble Bond Dickinson (US) LLP
- Agent Joseph Bach, Esq.
- Priority: JP2014-242266 20141128
- International Application: PCT/JP2015/005871 WO 20151126
- International Announcement: WO2016/084375 WO 20160602
- Main IPC: H05K3/00
- IPC: H05K3/00 ; B23K26/382 ; H05K1/03 ; H05K3/46

Abstract:
The present invention enables the manufacture of a small-sized high-density multi-layer printed circuit board. The manufacturing method for a multi-layer printed circuit board, according to the present invention, comprises: a step in which an electrical insulation layer is formed by heating a laminate comprising a substrate, a heat-curable resin composition layer provided on the substrate, and a release substrate provided on the heat-curable resin composition layer, thereby curing the heat-curable resin composition layer, and a step in which a via hole is formed in the electrical insulation layer by irradiating a laser from above the release substrate. In addition, in the present invention, the release substrate has a thickness of at least 80 μm and is formed using a material having a glass transition temperature, the heat-curable resin composition layer has a volatile component-content of 7.0 mass % or less and a thickness of 25 μm or less, and the curing of the heat-curable resin composition layer occurs at a temperature that is not less than the glass transition temperature of the material of the release substrate.
Public/Granted literature
- US20180184525A1 MANUFACTURING METHOD FOR MULTI-LAYER PRINTED CIRCUIT BOARD Public/Granted day:2018-06-28
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