Invention Grant
- Patent Title: Fluorination during ALD high-k, fluorination post high-k and use of a post fluorination anneal to engineer fluorine bonding and incorporation
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Application No.: US15413167Application Date: 2017-01-23
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Publication No.: US10580643B2Publication Date: 2020-03-03
- Inventor: Johanes S. Swenberg , Linlin Wang , Wei Liu
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson + Sheridan LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/28 ; H01L29/51

Abstract:
Embodiments of the present disclosure generally relate to methods for forming a high-k gate dielectric in a transistor. The high-k gate dielectric may be formed by introducing a fluorine containing gas into a processing chamber during the deposition of the high-k gate dielectric in the processing chamber. In one embodiment, the high-k gate dielectric is formed by an ALD process in a processing chamber, and a fluorine containing gas is introduced into the processing chamber during one or more stages of the ALD process. Fluorine ions, molecules or radicals from the fluorine containing gas (may be activated by a plasma) can fill the oxygen vacancies in the high-k dielectric.
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