Invention Grant
- Patent Title: Memory arrays
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Application No.: US16368361Application Date: 2019-03-28
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Publication No.: US10580776B2Publication Date: 2020-03-03
- Inventor: Werner Juengling
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc
- Current Assignee: Micron Technology, Inc
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: G11C5/02
- IPC: G11C5/02 ; H01L29/78 ; H01L49/02 ; H01L27/088 ; H01L27/108

Abstract:
Some embodiments include a memory array having memory cells arranged in rows and columns. The rows extend along a first direction and the columns extend along a second direction, with an angle between the first and second directions being less than 90°. Wordline trunk regions extend across the array and along a third direction substantially orthogonal to the second direction of the columns. Wordline branch regions extend from the wordline trunk regions and along the first direction. Semiconductor-material fins are along the rows. Each semiconductor-material fin has a first source/drain region, a second source/drain region, and a channel region between the first and second source/drain regions. Each channel region is overlapped by a wordline branch. Digit lines extend along the columns and are electrically coupled with the second source/drain regions. Charge-storage devices are electrically coupled with the first source/drain regions.
Public/Granted literature
- US20190221568A1 Memory Arrays Public/Granted day:2019-07-18
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