In one embodiment, a system includes logic configured to receive data comprising a plurality of data elements, where each data element comprises one or more bits. Further, the logic is configured to output bursts of data comprising the plurality of data elements along with a number of parity bits equal to a number of data elements in the plurality of data elements received from a first parity module to an input of a data path. Further still, the system includes a binary sequence generator configured to create a binary sequence comprising a plurality of bonus bits in a pseudo-random pattern that has less than a predetermined chance of matching any sequence of bits in the data while in the data path. Further still, the first parity module is configured to provide a parity calculation prior to passing the plurality of data elements to the input of the data path.