Invention Grant
- Patent Title: Selection of die and package parasitic for IO power domain
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Application No.: US15869484Application Date: 2018-01-12
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Publication No.: US10585999B2Publication Date: 2020-03-10
- Inventor: Nitin Kumar Chhabra , Rohit Halba
- Applicant: SEAGATE TECHNOLOGY LLC
- Applicant Address: US CA Cupertino
- Assignee: Seagate Technology LLC
- Current Assignee: Seagate Technology LLC
- Current Assignee Address: US CA Cupertino
- Agency: Kagan Binder, PLLC
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Systems and methods for selecting die and package parasitic for an input-output (IO) power domain are described. In one embodiment, the method includes determining a minimum on-die decoupling capacitance based at least in part on a product of a number of simultaneously switching IOs of the die and a maximum instantaneous current of an IO; determining a maximum package inductance based at least in part on a maximum operating frequency of an IC and a target impedance of a power delivery network of the die, the IC package, and a printed circuit board (PCB); and determining a maximum die resistance based at least in part on preventing the maximum die resistance from exceeding a maximum static IR drop of the die.
Public/Granted literature
- US20190220562A1 SELECTION OF DIE AND PACKAGE PARASITIC FOR IO POWER DOMAIN Public/Granted day:2019-07-18
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