Invention Grant
- Patent Title: System and method for pin automation for topology editing
-
Application No.: US15928627Application Date: 2018-03-22
-
Publication No.: US10586011B1Publication Date: 2020-03-10
- Inventor: Dennis Nagle , Amit Kumar Sharma , Delong Cai , Xuegang Zeng , Hui Qi
- Applicant: Cadence Design Systems, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Holland & Knight LLP
- Agent Mark H. Whittenberger, Esq.
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Embodiments include herein are directed towards a method for electronic circuit design. Embodiments may include displaying, at a graphical user interface, an electronic circuit design topology environment and allowing a user to select, create, or modify an entirely single pin topology, an entirely multi-pin topology, or a combination of a single pin topology and a multi-pin topology for one or more portions of the electronic circuit design topology environment. Embodiments may also include receiving a selection of a designated portion of the electronic circuit design topology environment and generating, at the graphical user interface, a first, pin-adjustable symbol in accordance with the selected topology at the designated portion.
Information query