An electronic circuit including: a first delay line circuit to generate a first data strobe by delaying a second data strobe, such that an edge of the first data strobe is aligned within a first time interval; and a sampling circuit to sample the first data signal at the edge of the first data strobe, wherein plural data signals include the first data signal and a second data signal, wherein timings of the plural data signals deviate from a reference timing of a reference data strobe by plural time lengths, wherein the first data signal deviates from the reference timing by a first time length of the plural time lengths, and wherein an edge of the second data strobe is aligned within a second time interval, wherein a timing of the second data signal deviates from the reference timing by a shortest time length of the plural time lengths.