Invention Grant
- Patent Title: Gate cut with high selectivity to preserve interlevel dielectric layer
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Application No.: US16013214Application Date: 2018-06-20
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Publication No.: US10586706B2Publication Date: 2020-03-10
- Inventor: Andrew M. Greene , Ryan O. Jung , Ruilong Xie
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk KY Grand Cayman
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,GLOBALFOUNDRIES INC
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,GLOBALFOUNDRIES INC
- Current Assignee Address: US NY Armonk KY Grand Cayman
- Agency: Tutunjian & Bitetto, P.C.
- Agent Vazken Alexanian
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/283 ; H01L29/66 ; H01L21/28 ; H01L21/311 ; H01L27/02 ; H01L21/033 ; H01L21/3105

Abstract:
A method for preserving interlevel dielectric in a gate cut region includes recessing a dielectric fill to expose cap layers of gate structures formed in a device region and in a cut region and forming a liner in the recess on top of the recessed dielectric fill. The liner includes a material to provide etch selectivity to protect the dielectric fill. The gate structures in the cut region are recessed to form a gate recess using the liner to protect the dielectric fill from etching. A gate material is removed from within the gate structure using the liner to protect the dielectric fill from etching. A dielectric gap fill is formed to replace the gate material and to fill the gate recess in the cut region.
Public/Granted literature
- US20180315606A1 GATE CUT WITH HIGH SELECTIVITY TO PRESERVE INTERLEVEL DIELECTRIC LAYER Public/Granted day:2018-11-01
Information query
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