Invention Grant
- Patent Title: Fan-out interconnect structure and methods forming the same
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Application No.: US15601310Application Date: 2017-05-22
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Publication No.: US10586724B2Publication Date: 2020-03-10
- Inventor: Yu-Hsiang Hu , Chung-Shi Liu , Hung-Jui Kou , Ming-Da Cheng
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/683
- IPC: H01L21/683 ; H01L21/48 ; H01L21/288 ; H01L23/31 ; H01L23/538 ; H01L21/56 ; H01L23/498
Abstract:
A method includes forming an adhesive layer over a carrier, forming a sacrificial layer over the adhesive layer, forming through-vias over the sacrificial layer, and placing a device die over the sacrificial layer. The Method further includes molding and planarizing the device die and the through-vias, de-bonding the carrier by removing the adhesive layer, and removing the sacrificial layer.
Public/Granted literature
- US20170263489A1 Fan-Out Interconnect Structure and Methods Forming the Same Public/Granted day:2017-09-14
Information query
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