Invention Grant
- Patent Title: Self-aligned punch through stopper liner for bulk FinFET
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Application No.: US15795370Application Date: 2017-10-27
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Publication No.: US10586739B2Publication Date: 2020-03-10
- Inventor: Veeraraghavan Basker , Kangguo Cheng , Theodorus Standaert , Junli Wang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/66 ; H01L29/167 ; H01L29/10 ; H01L27/092 ; H01L21/02 ; H01L21/311 ; H01L21/3105 ; H01L21/308 ; H01L21/3065 ; H01L21/762

Abstract:
A technique relates to forming a self-aligning field effect transistor. A starting punch through stopper comprising a substrate having a plurality of fins patterned thereon, an n-type field effect transistor (NFET) region, a p-type field effect transistor (PFET) region, and a center region having a boundary defect at the interface of the NFET region and the PFET region is first provided. The field effect transistor is then masked to mask the NFET region and the PFET region such that the center region is exposed. A center boundary region is then formed by etching the center region to remove the boundary defect.
Public/Granted literature
- US20180047637A1 SELF-ALIGNED PUNCH THROUGH STOPPER LINER FOR BULK FINFET Public/Granted day:2018-02-15
Information query
IPC分类: