Invention Grant
- Patent Title: Method for manufacturing pairs of CMOS transistors of the “fin-FET” type at low temperatures
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Application No.: US16191951Application Date: 2018-11-15
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Publication No.: US10586740B2Publication Date: 2020-03-10
- Inventor: Benoit Mathieu , Perrine Batude
- Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Applicant Address: FR Paris
- Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Current Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Current Assignee Address: FR Paris
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: FR1761089 20171123
- Main IPC: H01L21/82
- IPC: H01L21/82 ; H01L21/8238 ; H01L21/822 ; H01L27/092 ; H01L21/033 ; H01L29/66 ; H01L29/04 ; H01L21/266
Abstract:
Method for producing a device provided with FinFET transistors, comprising the following steps: a) making amorphous and doping a first portion of a semiconductor in via a tilted beam oriented toward a first lateral face of the fin, while retaining a first crystalline semiconductor block against a second lateral face of the fin, then b) carrying out at least one recrystallization annealing of said first portion, then c) making amorphous and doping a second portion via a tilted beam oriented toward the second lateral face of the fin, while retaining a second crystalline semiconductor block against said first lateral face of the fin, then d) carrying out at least one recrystallization annealing of the second portion.
Public/Granted literature
- US20190157164A1 METHOD FOR MANUFACTURING PAIRS OF CMOS TRANSISTORS OF THE "FIN-FET" TYPE AT LOW TEMPERATURES Public/Granted day:2019-05-23
Information query
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