According to one embodiment, a semiconductor memory device includes a first electrode layer having a first area, a second area, and a connection area connecting the first area to the second area, and a plurality of semiconductor pillars extending in a first direction through the first electrode layer in the first area and the second area. The plurality of semiconductor pillars are arranged in an array in a second direction and in a third direction intersecting with the second direction, the second direction and the third direction being parallel to the surface of the first electrode layer, and the connection area has no semiconductor pillars disposed therein.