A semiconductor structure, such as a strained FinFETs, includes a strain relief buffer (SRB) layer isolated and separated from a source and a drain by a spacer that may be simultaneously formed with a gate spacer upon the sidewalls of a gate structure. The spacer limits the source and drain from contacting the SRB layer thereby limiting source drain junction leakage. Further, the spacer limits source and drain punch through to the SRB layer underneath a channel. An etch may partially remove a SRB layer portion within a fin stack. The etch undercuts the source and drain forming a fin void without under cutting the channel. The spacer may be formed by depositing spacer material with the fin void.