Invention Grant
- Patent Title: DV/DT self-adjustment gate driver architecture
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Application No.: US16290158Application Date: 2019-03-01
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Publication No.: US10587262B1Publication Date: 2020-03-10
- Inventor: Sergio Morini , Martina Arosio , Karl Norling
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT
- Agency: Design IP
- Main IPC: H02M3/156
- IPC: H02M3/156 ; H03K17/687 ; H03K17/16

Abstract:
A gate driver circuit includes a gate driver and a sensing circuit. The gate driver is configured to generate an on-current during a plurality of turn-on switching events to drive a transistor, where a voltage across the transistor changes from a first value to a second value with a slope during the plurality of turn-on switching events, where the slope is of either an active type dependent on an amplitude of the on-current or a passive type. The sensing circuit determines whether the slope during a first turn-on switching event is the active type or the passive type, and regulates the amplitude of the on-current during a second turn-on switching event that is subsequent to the first turn-on switching event if the slope is the active type and to maintain the amplitude of the on-current as unchanged during the second turn-on switching event if the slope is the passive type.
Information query
IPC分类: